Williams, G. L. and Seed, N. L. and Purvis, A. and Maiden, A. and McWilliam, R. and Ivey, P. A. and Johnson, S. (2005) 'Non-planar interconnect.', Circuit world., 31 (2). pp. 10-14.
Purpose – This paper describes a method for patterning fine line interconnections over non-planar surfaces and introduces the idea of using holographic masks for more challenging geometries. Design/methodology/approach – A photolithographic method for achieving grossly non-planar interconnects is described. The patterning of electrical interconnections onto the piezo-electric actuators of an ink-jet print head is used as an example. Uniform coverage of the substrate is achieved using an electro-depositable photoresist. The required pattern is transferred via a custom-designed chrome-on-glass mask using a standard mask aligner. Findings – Large arrays of 100?µm-pitch electrical interconnections were successfully deposited onto 500?µm-high high piezo-electric actuators. It was necessary to modify the shapes of the line segments on the mask in order to compensate for diffractive line broadening. For more extreme 3D geometries it becomes necessary to consider the use of holographic masks. Originality/value – Printed circuit boards and semiconductor wafers are nominally flat and traditional lithographic processes have been developed accordingly. However, future microelectronic packaging schemes and microsystems may require patterning to be achieved on grossly non-planar surfaces. We have demonstrated that this can be achieved on ink-jet print heads using photolithography and point to the research necessary to enable it to be realised on more extreme non-planar substrates.
|Keywords:||Circuits, Electrodeposition, Ink jet printers, Packaging.|
|Full text:||Full text not available from this repository.|
|Publisher Web site:||http://dx.doi.org/10.1108/03056120510571798|
|Record Created:||22 Jan 2007|
|Last Modified:||04 Aug 2010 16:03|
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