A CMOS SPAD Line Sensor With Per-Pixel Histogramming TDC for Time-Resolved Multispectral Imaging

Erdogan, Ahmet T.; Walker, Richard; Finlayson, Neil; Krstajic, Nikola; Williams, Gareth; Girkin, John; Henderson, Robert

doi:10.1109/jssc.2019.2894355

A CMOS SPAD Line Sensor With Per-Pixel Histogramming TDC for Time-Resolved Multispectral Imaging

Erdogan, Ahmet T.; Walker, Richard; Finlayson, Neil; Krstajic, Nikola; Williams, Gareth; Girkin, John; Henderson, Robert

Authors

Ahmet T. Erdogan

Richard Walker

Neil Finlayson

Nikola Krstajic

Gareth Williams

Professor John Girkin j.m.girkin@durham.ac.uk
Professor

Robert Henderson

Abstract

A 512 × 16 single photon avalanche diode (SPAD)-based line sensor is designed in a 0.13- μm CMOS image sensor technology for time-resolved multispectral beam scanned imaging. The sensor has 23.78- μm pixel pitch and incorporates one SPAD array with 49.31% fill factor optimized for detection in the blue–green spectral region, and a second array at 15.75% fill factor optimized for the red-near-infrared response spectral region. Each pixel contains a 32-bin histogramming time-to-digital converter (TDC) with a mean time resolution of 51.20 ps. Histogram bin resolutions are adjustable from 51.20 ps to 6.55 ns per bin. The line sensor can operate in single photon counting (SPC) mode (102.1 giga-events/s), time-correlated SPC (TCSPC) mode (192.4 million-events/s) or on-chip histogramming mode (16.5 giga-events/s), increasing the count rate up to 85 times compared to TCSPC mode. Sensor capability is demonstrated through spectral fluorescence lifetime imaging, resolving three fluorophore populations with distinct fluorophore lifetimes.

Citation

Erdogan, A. T., Walker, R., Finlayson, N., Krstajic, N., Williams, G., Girkin, J., & Henderson, R. (2019). A CMOS SPAD Line Sensor With Per-Pixel Histogramming TDC for Time-Resolved Multispectral Imaging. IEEE Journal of Solid-State Circuits, 54(6), 1705-1719. https://doi.org/10.1109/jssc.2019.2894355

Journal Article Type	Article
Acceptance Date	Jan 6, 2019
Online Publication Date	May 26, 2019
Publication Date	May 31, 2019
Deposit Date	May 28, 2019
Publicly Available Date	May 28, 2019
Journal	IEEE Journal of Solid-State Circuits
Print ISSN	0018-9200
Electronic ISSN	1558-173X
Publisher	Institute of Electrical and Electronics Engineers
Peer Reviewed	Peer Reviewed
Volume	54
Issue	6
Pages	1705-1719
DOI	https://doi.org/10.1109/jssc.2019.2894355

Files

Accepted Journal Article (1.5 Mb)
PDF

Copyright Statement
© 2019 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.