Hardware/Software Partitioning in Verilog

Qin, S.; He, J.; Qiu, Z.; Zhang, N.; George, C.; Miao, H.

doi:10.1007/3-540-36103-0_19

Hardware/Software Partitioning in Verilog

Qin, S.; He, J.; Qiu, Z.; Zhang, N.; George, C.; Miao, H.

Authors

S. Qin

J. He

Z. Qiu

N. Zhang

C. George

H. Miao

Abstract

We propose in this paper an algebraic approach to hardware/software partitioning in Verilog HDL. We explore a collection of algebraic laws for Verilog programs, from which we design a set of syntax-based algebraic rules to conduct hardware/software partitioning. The co-specification language and the target hardware and software description languages are specific subsets of Verilog, which brings forth our successful verification for the correctness of the partitioning process by algebra of Verilog. Facilitated by Verilog’s rich features, we have also successfully studied hw/sw partitioning for environment-driven systems.

Citation

Qin, S., He, J., Qiu, Z., Zhang, N., George, C., & Miao, H. (2002). Hardware/Software Partitioning in Verilog. In Formal methods and software engineering : 4th International Conference on Formal Engineering Methods, ICFEM 2002, 21-25 October 2002, Shanghai, China ; proceedings (168-179). https://doi.org/10.1007/3-540-36103-0_19

Conference Name	Formal Methods and Software Engineering : 5th International Conference on Formal Engineering Methods (ICFEM 2002)
Conference Location	Shanghai, China
Start Date	Oct 21, 2002
End Date	Oct 25, 2002
Publication Date	Oct 25, 2002
Deposit Date	Nov 20, 2009
Publicly Available Date	Dec 10, 2009
Publisher	Springer Verlag
Pages	168-179
Series Title	Lecture notes in computer science.
Series Number	2495
Book Title	Formal methods and software engineering : 4th International Conference on Formal Engineering Methods, ICFEM 2002, 21-25 October 2002, Shanghai, China ; proceedings.
ISBN	9783540000297
DOI	https://doi.org/10.1007/3-540-36103-0_19
Keywords	Verilog, Algebraic laws, Hardware/software co-design, Hardware/software partitioning.