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Run-time mapping of applications to a heterogeneous reconfigurable tiled system on chip architecture.

Smit, L.T. and Smit, G.J.M. and Hurink, J.L. and Broersma, H.J. and Paulusma, D. and Wolkotte, P.T. (2004) 'Run-time mapping of applications to a heterogeneous reconfigurable tiled system on chip architecture.', in 2004 IEEE International Conference on Field-Programmable Technology: Proceedings: December 6-8, 2004, the University of Queensland, Brisbane, Australia. , pp. 421-424.

Abstract

This work evaluates an algorithm that maps a number of communicating processes to a heterogeneous tiled system on chip (SoC) architecture at run-time. The mapping algorithm minimizes the total amount of energy consumption, while still providing an adequate quality of service (QoS). A realistic example is mapped using this algorithm.

Item Type:Book chapter
Full text:(AM) Accepted Manuscript
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Status:Peer-reviewed
Publisher Web site:http://dx.doi.org/10.1109/FPT.2004.1393315
Publisher statement:© 2004 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.
Date accepted:No date available
Date deposited:09 January 2015
Date of first online publication:2004
Date first made open access:No date available

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